Series in Microelectronics
Impact Ionization in Silicon
at High Temperature
2007, VIII, 210 pages. € 64,00. ISBN 3-86628-136-6
This work presents an investigation of mobility and impact ionization in silicon at high temperature. Proper device architectures and materials have been developed and novel technology solutions for wire bonding and packaging have been used for extending the temperature range. The test structure design and the extraction of the physical parameters have been assisted by two and three-dimensional TCAD simulations. The mobility has been measured by the Hall technique up to 1000 K thanks to the use of Ti/TiN interconnections in combination with junction-free van der Pauw resistors. A new extraction methodology has been proposed to account for the reduced Hall voltage in lightly doped silicon due to the conduction of minority carriers. The hole and the electron impact ionization coefficients have been determined as a function of the electrical field up to 673 K and 613 K, respectively, by measurements of the multiplication factor in bipolar and static induction transistors.
About the Author
Chiara Corvasce received the M.S. Degree in Physics in 1994 from the University of Bari (Italy). In 1996 she joined the Memory Product Group of STMicroelectronis in Catania (Italy) working on non-volatile memory devices and from 1998 up to 2002 in the development of a ferroelectric memory prototype. Since 2002 she has been with the Integrated Systems Laboratory (IIS) of the ETH Zurich as research assistant. Her research activity has been focused on high temperature characterization and modelling of semiconductor devices.
Keywords: Silicon, ionization, device architecture, semiconductor device, high temperature.
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