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Series in Microelectronics
edited by Qiuting Huang
Mathieu Maurice Luisier
Pirmin Robert Vogel
Shared Virtual Memory for
Systems on Chips
2018. XVI, 198 pages. € 64,00
The most difficult obstacles for exploiting the full potential of modern heterogeneous embedded systems on chip (HESoCs) are posed by the partitioned memory models between host processor and accelerators. Sharing data requires the programmer to manually orchestrate data copies between virtually and physically addressed main memory sections, including the translation of virtual address pointers. This limits performance and is completely prohibitive for the heterogeneous implementation of applications operating on complex, pointer-rich data structures.
This thesis investigates the design of transparent, zero-copy shared virtual memory (SVM) frameworks for HESoCs that al- low to simply pass pointers between host and accelerators, and thereby improve both programmability and performance. Compared to full-fledged hardware solutions for SVM found in highperformance computing systems, the proposed mixed hardware-software designs are i) better suited for area- and power-constrained embedded systems, ii) less intrusive to the hardware architecture of both host and accelerators, and iii) allow for greater flexibility, while offering competitive or even superior performance.
About the Author:
Pirmin Vogel was born in Switzerland in 1986. He received his BSc and MSc degrees from ETH Zurich, Switzerland, in 2009 and 2013. In 2013, he joined the group of Prof. Dr. Luca Benini at the Integrated Systems Laboratory at ETH Zurich. His research interests include heterogeneous computing architectures with a focus on operating system, driver, runtime and programming model support for efficient and transparent accelerator programming.
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