Series in Microelectronics

edited by Wolfgang Fichtner
Qiuting Huang
Heinz Jäckel
Hans Melchior
George S. Moschytz
Gerhard Tröster

Vol. 150

Ichiro Omura,
High Voltage MOS Device Design:
Injection Enhancement and Negative Gate Capacitance
2005; 132 pages. € 64,00. ISBN 3-89649-694-8

In this thesis the device physics of injection enhancement effect (IE-effect) and the development of injection enhancement gate transistor (IEGT) is described in detail. IEGT structure reduces the voltage drop in the device and this design concept has become indispensable to realize high voltage MOS devices. Apart from the attractive characteristics, IEGT's show unstable operation phenomena during switching transients such as current oscillation between chips in multi-chip packages. In this work, it has been found for the first time that the instability is due to negative gate capacitance phenomena. This thesis describes device and package design to prevent the undesirable phenomena. IEGT’s have been installed to several high power applications and replacing GTO’s.

Ichiro Omura was born in Iwate, Japan, on April 13, 1961. He studied mathematics at Department of Science, Osaka University, Toyonaka, Osaka where he received his master degree of science in 1987. In the following year he joined Toshiba corporation in Japan and involved in device simulator development and semiconductor power device research. Since April 1996, he was an academic guest of Integrated Systems Laboratory, Swiss Federal Institute of Technology Zurich, Switzerland for 18 months. His research interests are advanced semiconductor power devices for future power electronics applications.

Keywords (German): Leistungselektronik, Halbleiterbauelemente, Hochspannungsbauelemente, GTO, MOS, IGBT, Bauelementsimulation, TCAD

Series in Microelectronics

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