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Series in Microelectronics

edited by       Wolfgang Fichtner
                        Qiuting Huang
                        Heinz Jäckel
                        Gerhard Tröster
                        Bernd Witzigmann

Vol. 193



Felix Bürgin,

Low-Power Circuit Architectures and
Clocking Strategies for Digital Hearing Aids.


2008, 170 pages. € 64,00. ISBN 978-3-86628-211-7



This thesis aims at evaluating different low-power VLSI circuit design techniques that are especially suited for low-frequency audio applications, such as hearing aids. Thereby, several circuit architectures are compared for different levels of resource sharing, number formats, and clocking strategies in established VLSI technologies (minimum transistor lengths of 0.25um and 0.18um). Additionally, cell redesign for reduced gate capacitance and hence lower dynamic power consumption is investigated. All these techniques have been verified by simulations and measurements of several state-of-the-art hearing aid signal processing algorithms that have been implemented and integrated on silicon.




About the Author:
Felix Bürgin received the Dipl. Ing. degree in Electrical Engineering from ETH Zurich in 2003. After his graduation he joined the Integrated Systems Laboratory (IIS) of ETH Zurich as a research and teaching assistant. There, he worked on the design of low power ASICs, focused on hearing aids and mobile applications.


Keywords: Hearing Aids, Low Power, Circuit Architecture, Clocking Discipline, Number Format, VLSI

Series in Microelectronics

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